AMD Explains Why Dual 3D V-Cache on Ryzen CPUs Remains Unfeasible

With the launch of AMD’s latest Zen 5 3D V-Cache CPUs, including the Ryzen 9 9950X3D and Ryzen 9 9900X3D, enthusiasts have been curious as to why AMD has not implemented 3D V-Cache on all Core Chiplet Dies (CCDs). AMD has now provided clarity, and it’s not due to technical constraints, but rather economic and efficiency concerns.

AMD’s Statement: Why No Dual 3D V-Cache Yet?

HardwareLuxx posed the question directly to AMD, asking whether technical limitations prevent a dual 3D V-Cache design. AMD’s response dismissed technical barriers, stating:

"There are no technical reasons or challenges. Such a processor would simply be too expensive, and games would not benefit from a second CCD with a 3D V-Cache to the same extent as they would from the step from 32 to 96 MB L3 cache for one CCD."

This suggests that while AMD has the capability to implement 3D V-Cache on all CCDs, it has opted not to due to financial impracticality. For gamers and many typical use cases, the performance benefits of doubling the 3D V-Cache do not justify the increased costs.

Challenges Beyond Economics: Thread Scheduling Inefficiencies

AMD also highlighted that using 3D V-Cache across multiple CCDs could introduce thread scheduling inefficiencies. Here's why:

• Core Preference: Threads perform best on cores equipped with 3D V-Cache. In a dual-cache setup, thread management would need to ensure that workloads dynamically remain on these cores.

• Dynamic Threading Issues: Threads moving between CCDs could negate performance benefits, as some CCDs might lack the additional cache, leading to suboptimal utilization.

This trade-off would potentially diminish any theoretical performance gains and complicate the processor’s design for consumer applications.

Testing Dual 3D V-Cache: A Glimpse of the Future?

Interestingly, AMD confirmed that it has internally tested CPUs with dual 3D V-Cache. However, the company decided not to release these products for consumer markets due to the aforementioned economic and performance challenges.

That said, AMD hinted at the possibility of dual 3D V-Cache CPUs making their way into specialized markets where high costs can be justified by the performance demands of enterprise or professional applications.

AMD’s decision to limit 3D V-Cache to one CCD is less about capability and more about striking the right balance between cost, efficiency, and consumer demand. While a dual 3D V-Cache implementation remains out of reach for gaming CPUs today, it could become viable for niche markets in the future.

What are your thoughts on AMD’s approach? Would you like to see dual 3D V-Cache in future Ryzen CPUs, even at a higher cost? Let us know in the comments!